SEVONPEND=0, SLEEPONEXIT=0, SLEEPDEEP=0
System Control Register
| RESERVED | Reserved |
| SLEEPONEXIT | no description available 0 (0): o not sleep when returning to Thread mode 1 (1): enter sleep, or deep sleep, on return from an ISR |
| SLEEPDEEP | no description available 0 (0): sleep 1 (1): deep sleep |
| RESERVED | Reserved |
| SEVONPEND | no description available 0 (0): only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded 1 (1): enabled events and all interrupts, including disabled interrupts, can wakeup the processor |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |